| Server IP : 127.0.0.2 / Your IP : 13.59.113.183 Web Server : Apache/2.4.18 (Ubuntu) System : User : www-data ( ) PHP Version : 7.0.33-0ubuntu0.16.04.16 Disable Function : disk_free_space,disk_total_space,diskfreespace,dl,exec,fpaththru,getmyuid,getmypid,highlight_file,ignore_user_abord,leak,listen,link,opcache_get_configuration,opcache_get_status,passthru,pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,php_uname,phpinfo,posix_ctermid,posix_getcwd,posix_getegid,posix_geteuid,posix_getgid,posix_getgrgid,posix_getgrnam,posix_getgroups,posix_getlogin,posix_getpgid,posix_getpgrp,posix_getpid,posix,_getppid,posix_getpwnam,posix_getpwuid,posix_getrlimit,posix_getsid,posix_getuid,posix_isatty,posix_kill,posix_mkfifo,posix_setegid,posix_seteuid,posix_setgid,posix_setpgid,posix_setsid,posix_setuid,posix_times,posix_ttyname,posix_uname,pclose,popen,proc_open,proc_close,proc_get_status,proc_nice,proc_terminate,shell_exec,source,show_source,system,virtual MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : ON | Sudo : ON | Pkexec : ON Directory : /lib/modules/4.4.0-1084-aws/build/include/linux/ |
Upload File : |
/*
* 10G controller driver for Samsung EXYNOS SoCs
*
* Copyright (C) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Author: Siva Reddy Kallam <siva.kallam@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __SXGBE_PLATFORM_H__
#define __SXGBE_PLATFORM_H__
/* MDC Clock Selection define*/
#define SXGBE_CSR_100_150M 0x0 /* MDC = clk_scr_i/62 */
#define SXGBE_CSR_150_250M 0x1 /* MDC = clk_scr_i/102 */
#define SXGBE_CSR_250_300M 0x2 /* MDC = clk_scr_i/122 */
#define SXGBE_CSR_300_350M 0x3 /* MDC = clk_scr_i/142 */
#define SXGBE_CSR_350_400M 0x4 /* MDC = clk_scr_i/162 */
#define SXGBE_CSR_400_500M 0x5 /* MDC = clk_scr_i/202 */
/* Platfrom data for platform device structure's
* platform_data field
*/
struct sxgbe_mdio_bus_data {
unsigned int phy_mask;
int *irqs;
int probed_phy_irq;
};
struct sxgbe_dma_cfg {
int pbl;
int fixed_burst;
int burst_map;
int adv_addr_mode;
};
struct sxgbe_plat_data {
char *phy_bus_name;
int bus_id;
int phy_addr;
int interface;
struct sxgbe_mdio_bus_data *mdio_bus_data;
struct sxgbe_dma_cfg *dma_cfg;
int clk_csr;
int pmt;
int force_sf_dma_mode;
int force_thresh_dma_mode;
int riwt_off;
};
#endif /* __SXGBE_PLATFORM_H__ */